14360 search results - page 52 / 2872 » Time Modeling in MARTE |
TC
2002
13 years 8 months ago
2002
Abstract-- Current systems are very often based on largescale, unpredictable and unreliable infrastructures. However, users of these systems increasingly require services with time...
ASYNC
2005
IEEE
14 years 2 months ago
2005
IEEE
We propose a novel technique for modeling and verifying timed circuits based on the notion of generalized relative timing. Generalized relative timing constraints can express not ...
FMCAD
2000
Springer
14 years 10 days ago
2000
Springer
Abstract. Model checking is an automated approach to the formal verification of hardware and software. To allow model checking tools to be used by the hardware or software designer...
ASPDAC
2008
ACM
13 years 10 months ago
2008
ACM
The timing models used in current Static Timing Analysis tools use gate delays only for single input switching events. It is well known that the temporal proximity of signals arriv...
ASPDAC
2010
ACM
13 years 6 months ago
2010
ACM
This paper proposes a source-level timing annotation method for generation of accurate transaction level models for software computation modules. While Transaction Level Modeling ...