Sciweavers

1449 search results - page 235 / 290
» Time Synchronization
Sort
View
ICCAD
2004
IEEE
87views Hardware» more  ICCAD 2004»
14 years 6 months ago
Exploiting level sensitive latches in wire pipelining
Wire pipelining emerges as a new necessity for global wires due to increasing wire delay, shrinking clock period and growing chip size. Existing approaches on wire pipelining are ...
V. Seth, Min Zhao, Jiang Hu
CVPR
2010
IEEE
14 years 5 months ago
High-Resolution Modeling of Moving and Deforming Objects Using Sparse Geometric and Dense Photometric Measurements
Modeling moving and deforming objects requires capturing as much information as possible during a very short time. When using off-the-shelf hardware, this often hinders the resolu...
Yi Xu, Daniel Aliaga
CISIS
2009
IEEE
14 years 4 months ago
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
—Regular multi-core processors are appearing in the embedded system market as high performance software programmable solutions. The use of regular interconnect fabrics for them a...
Francisco Gilabert Villamón, Daniele Ludovi...
INFOCOM
2009
IEEE
14 years 3 months ago
Blind Detection of Spread Spectrum Flow Watermarks
— Recently, the direct sequence spread-spectrum (DSSS)-based technique has been proposed to trace anonymous network flows. In this technique, homogeneous pseudo-noise (PN) codes...
Weijia Jia, Fung Po Tso, Zhen Ling, Xinwen Fu, Don...
IPPS
2009
IEEE
14 years 3 months ago
Crash fault detection in celerating environments
Failure detectors are a service that provides (approximate) information about process crashes in a distributed system. The well-known “eventually perfect” failure detector, 3P...
Srikanth Sastry, Scott M. Pike, Jennifer L. Welch