145 search results - page 6 / 29 » Time and memory tradeoffs in the implementation of AUTOSAR c... |
CONIELECOMP
2011
IEEE
13 years 10 hour ago
2011
IEEE
This work focuses on developing systems of blocks in SIMULINK and VHDL to reuse on design of applications involving the recognition of polygonal objects. Usage of this work reduce...
ISCA
2012
IEEE
11 years 11 months ago
2012
IEEE
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...
ISCA
1996
IEEE
14 years 18 days ago
1996
IEEE
This paper investigates hardware support for fine-grain distributed shared memory (DSM) in networks of workstations. To reduce design time and implementation cost relative to dedi...
FPGA
2004
ACM
14 years 1 months ago
2004
ACM
The speedup over a microprocessor that can be achieved by implementing some programs on an FPGA has been extensively reported. This paper presents an analysis, both quantitative a...
DAC
2011
ACM
12 years 8 months ago
2011
ACM
Technology scaling allows the integration of billions of transistors on the same die but CAD tools struggle in keeping up with the increasing design complexity. Design productivit...