70 search results - page 6 / 14 » Time-Energy Design Space Exploration for Multi-Layer Memory ... |
DAC
1997
ACM
14 years 3 days ago
1997
ACM
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
CSREAESA
2006
13 years 9 months ago
2006
Modern processors have a small on-chip local memory for instructions. Usually it is in the form of a cache but in some cases it is an addressable memory. In the latter, the user is...
ICCD
1999
IEEE
14 years 6 days ago
1999
IEEE
This research explores any potential for an on-chip cache compression which can reduce not only cache miss ratio but also miss penalty, if main memory is also managed in compresse...
CASES
2006
ACM
14 years 1 months ago
2006
ACM
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
IPPS
2002
IEEE
14 years 25 days ago
2002
IEEE
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...