Sciweavers

411 search results - page 73 / 83
» Timed Alternating-Time Temporal Logic
Sort
View
DATE
2000
IEEE
90views Hardware» more  DATE 2000»
14 years 2 months ago
Cost Reduction and Evaluation of a Temporary Faults Detecting Technique
: IC technologies are approaching the ultimate limits of silicon in terms of channel width, power supply and speed. By approaching these limits, circuits are becoming increasingly ...
Lorena Anghel, Michael Nicolaidis
SIGSOFT
2007
ACM
14 years 10 months ago
Quantitative verification: models techniques and tools
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...
Marta Z. Kwiatkowska
HICSS
1998
IEEE
112views Biometrics» more  HICSS 1998»
14 years 2 months ago
AESOP: An Outline-Oriented Authoring System
Because a hypermedia document is more complex than conventional text, it requires preparation with respect to two key aspects. First, the author begins to develop a "vision&q...
Takeshi Shimizu, Stephen W. Smoliar, John S. Borec...
CASES
2006
ACM
14 years 1 months ago
State space reconfigurability: an implementation architecture for self modifying finite automata
Many embedded systems exhibit temporally and behaviorally disjoint behavior slices. When such behaviors are captured by state machines, the current design flow will capture it as ...
Ka-Ming Keung, Akhilesh Tyagi
FPL
2008
Springer
116views Hardware» more  FPL 2008»
13 years 11 months ago
Shared reconfigurable architectures for CMPS
This paper investigates reconfigurable architectures suitable for chip multiprocessors (CMPs). Prior research has established that augmenting a conventional processor with reconfi...
Matthew A. Watkins, Mark J. Cianchetti, David H. A...