769 search results - page 28 / 154 » Timed Circuit Synthesis Using Implicit Methods |
ICCAD
2000
IEEE
14 years 1 months ago
2000
IEEE
ct Static timing analysis has traditionally used the PERT method for identifying the critical path of a digital circuit. Due to the influence of the slope of a signal at a particul...
GECCO
2000
Springer
14 years 1 months ago
2000
Springer
This paper presents a novel evolvable hardware framework for the automated design of digital circuits for high performance applications. The technique evolves circuits correspondi...
ICCS
2005
Springer
14 years 3 months ago
2005
Springer
A fast collision detection and resolution scheme is one of the key components for interactive simulation of deformable objects. It is particularly challenging to reduce the computa...
FPGA
2004
ACM
14 years 3 months ago
2004
ACM
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
ICCAD
1999
IEEE
14 years 2 months ago
1999
IEEE
We introduce a new method of verifying the timing of custom CMOS circuits. Due to the exponential number of patterns required, traditional simulation methods are unable to exhaust...