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» Timed Circuit Synthesis Using Implicit Methods
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ET
2000
145views more  ET 2000»
13 years 10 months ago
Fast Test Pattern Generation for Sequential Circuits Using Decision Diagram Representations
The paper presents a novel hierarchical approach to test pattern generation for sequential circuits based on an input model of mixed-level decision diagrams. A method that handles,...
Jaan Raik, Raimund Ubar
ASPDAC
2006
ACM
74views Hardware» more  ASPDAC 2006»
14 years 4 months ago
Macromodelling oscillators using Krylov-subspace methods
— We present an efficient method for automatically extracting unified amplitude/phase macromodels of arbitrary oscillators from their SPICE-level circuit descriptions. Such com...
Xiaolue Lai, Jaijeet S. Roychowdhury
ASPDAC
2006
ACM
98views Hardware» more  ASPDAC 2006»
14 years 4 months ago
Timing-driven placement based on monotone cell ordering constraints
− In this paper, we present a new timing-driven placement algorithm, which attempts to minimize zigzags and crisscrosses on the timing-critical paths of a circuit. We observed th...
Chanseok Hwang, Massoud Pedram
ASPDAC
2000
ACM
89views Hardware» more  ASPDAC 2000»
14 years 2 months ago
Circuit performance oriented device optimization using BSIM3 pre-silicon model parameters
We propose a circuit performance oriented device optimization methodology using pre-silicon parameters and critical paths which represent the performance of the chip. Based on our...
Mikako Miyama, Shiro Kamohara
ISMVL
2010
IEEE
209views Hardware» more  ISMVL 2010»
14 years 3 months ago
Secure Design Flow for Asynchronous Multi-valued Logic Circuits
—The purpose of secure devices such as smartcards is to protect secret information against software and hardware attacks. Implementation of the appropriate protection techniques ...
Ashur Rafiev, Julian P. Murphy, Alexandre Yakovlev