769 search results - page 61 / 154 » Timed Circuit Synthesis Using Implicit Methods |
ICCD
2004
IEEE
14 years 7 months ago
2004
IEEE
Abstract— This paper proposes a technique for creating a combinational logic network with an output that signals when all other outputs have stabilized. The method is based on du...
CGF
2002
13 years 10 months ago
2002
Texture mapping has become indispensable in image synthesis as an inexpensive source of rich visual detail. Less obvious, but just as useful, is its ability to mask image errors d...
FORMATS
2010
Springer
13 years 8 months ago
2010
Springer
We present a general approach to combine symbolic state space representations for the discrete and continuous parts in the synthesis of winning strategies for timed reachability ga...
ASYNC
2001
IEEE
14 years 1 months ago
2001
IEEE
This paper presents a new approach to two-level hazardfree sum-of-products logic minimization. No currently available minimizers for single-output literal-exact two-level hazard-f...
ISPD
2003
ACM
14 years 3 months ago
2003
ACM
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...