797 search results - page 110 / 160 » Timed Control with Partial Observability |
FPT
2005
IEEE
14 years 3 months ago
2005
IEEE
A methodology for supporting dynamic voltage scaling (DVS) on commercial FPGAs is described. A logic delay measurement circuit (LDMC) is used to determine the speed of an inverter...
HUC
2004
Springer
14 years 3 months ago
2004
Springer
We are developing a wearable device that attempts to alleviate some everyday memory problems. The “memory prosthesis” records audio and contextual information from conversation...
ITC
2003
IEEE
14 years 3 months ago
2003
IEEE
We present a novel methodology for concurrent error detection in linear analog circuits. We develop a rigorous theory that yields an error detection circuit of size that is, in ge...
EURODAC
1994
IEEE
14 years 2 months ago
1994
IEEE
This paper presents a testability improvement method for digital systems described in VHDL behavioral specification. The method is based on testability analysis at registertransfe...
DAGSTUHL
2003
13 years 11 months ago
2003
We embodied networks of cultured biological neurons in simulation and in robotics. This is a new research paradigm to study learning, memory, and information processing in real tim...