176 search results - page 19 / 36 » Timed Verification of Asynchronous Circuits |
ASYNC
2004
IEEE
13 years 11 months ago
2004
IEEE
This paper presents a decomposition method for speedindependent circuit design that is capable of significantly reducing the cost of synthesis. In particular, this method synthesi...
TCAD
2008
13 years 7 months ago
2008
Manufacturing process variations lead to variability in circuit delay and, if not accounted for, can cause excessive timing yield loss. The familiar traditional approaches to timin...
ASYNC
2002
IEEE
14 years 19 days ago
2002
IEEE
In a circuit environment that is becoming increasingly sensitive to dynamic power dissipation and noise, and where cycle time available for control decisions continues to decrease...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Abstract— Chip-package thermal analysis is necessary for the design and synthesis of reliable, high-performance, low-power, compact integrated circuits (ICs). Many methods of IC ...
CHES
2005
Springer
14 years 1 months ago
2005
Springer
Electromagnetic analysis (EMA) can be used to compromise secret information by analysing the electric and/or magnetic fields emanating from a device. It follows differential power...