176 search results - page 22 / 36 » Timed Verification of Asynchronous Circuits |
DAC
2004
ACM
14 years 8 months ago
2004
ACM
Current technology trends have led to the growing impact of both inter-die and intra-die process variations on circuit performance. While it is imperative to model parameter varia...
CONCUR
2010
Springer
13 years 8 months ago
2010
Springer
Many communication-centred systems today rely on asynchronous messaging among distributed peers to make efficient use of parallel execution and resource access. With such asynchron...
FPL
2000
Springer
13 years 11 months ago
2000
Springer
This paper reports on a method for extending existing VHDL design and verification software available for the Xilinx Virtex series of FPGAs. It allows the designer to apply standa...
ICCAD
2010
IEEE
13 years 5 months ago
2010
IEEE
1In this paper, we will present an effective layout method for analog circuits. We consider symmetry constraint, common centroid constraint, device merging and device clustering du...
JIRS
2007
13 years 7 months ago
2007
A detailed step-by-step approach is presented to optimize, standardize, and automate the process of unmanned vehicle controller design, evaluation, validation and verification, fol...