209 search results - page 5 / 42 » Timed compiled-code simulation of embedded software for perf... |
CODES
2009
IEEE
14 years 3 days ago
2009
IEEE
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
RTS
2006
13 years 7 months ago
2006
Abstract The increasing complexity of heterogeneous systems-on-chip, SoC, and distributed embedded systems makes system optimization and exploration a challenging task. Ideally, a ...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
Virtual platform (ViP), or ESL (Electronic System Level) simulation model, is one of the most widely renowned system level design techniques. In this paper, we present a case stud...
DT
2006
13 years 7 months ago
2006
process: Designers must define higher abstraction levels that allow system modeling. They must use description languages that handle both hardware and software components to descri...
CODES
1998
IEEE
13 years 11 months ago
1998
IEEE
Timing analysis for checking satisfaction of constraints is a crucial problem in real-time system design. In some current approaches, the delay of software modules is precalculate...