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TII
2011
206views Education» more  TII 2011»
13 years 3 months ago
Timing-Failure Risk Assessment of UML Design Using Time Petri Net Bound Techniques
Abstract—Software systems that do not meet their timing constraints can cause risks. In this work, we propose a comprehensive method for assessing the risk of timing failure by e...
Simona Bernardi, Javier Campos, José Merseg...
ISSS
1995
IEEE
116views Hardware» more  ISSS 1995»
14 years 7 days ago
The Chinook hardware/software co-synthesis system
Designers of embedded systems are facing ever tighter constraintson design time, but computer aided design tools for embedded systems have not kept pace with these trends. The Chi...
Pai H. Chou, Ross B. Ortega, Gaetano Borriello
ISCAS
2002
IEEE
111views Hardware» more  ISCAS 2002»
14 years 1 months ago
CASCADE - configurable and scalable DSP environment
As the complexity of embedded systems grows rapidly, it is common to accelerate critical tasks with hardware. Designers usually use off-the-shelf components or licensed IP cores t...
Tay-Jyi Lin, Chein-Wei Jen
CODES
2008
IEEE
14 years 3 months ago
Distributed and low-power synchronization architecture for embedded multiprocessors
In this paper we present a framework for a distributed and very low-cost implementation of synchronization controllers and protocols for embedded multiprocessors. The proposed arc...
Chenjie Yu, Peter Petrov
ISORC
2008
IEEE
14 years 3 months ago
Toward Effective Multi-Capacity Resource Allocation in Distributed Real-Time and Embedded Systems
Effective resource management for distributed real-time embedded (DRE) systems is hard due to their unique characteristics, including (1) constraints in multiple resources and (2)...
Nilabja Roy, John S. Kinnebrew, Nishanth Shankaran...