577 search results - page 45 / 116 » Timing Analysis of Embedded Software for Speculative Process... |
CJ
2006
13 years 8 months ago
2006
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
DSD
2007
IEEE
14 years 3 months ago
2007
IEEE
Abstract. In an embedded multiprocessor system the minimum throughput and maximum latency of real-time applications are usually derived given the worst-case execution time of the s...
TVLSI
2008
2008
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
13 years 8 months ago
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
DAC
2000
ACM
14 years 9 months ago
2000
ACM
In this paper we describe a new hardware/software partitioning approach for embedded reconfigurable architectures consisting of a general-purpose processor (CPU), a dynamically re...
DAC
2009
ACM
14 years 9 months ago
2009
ACM
In this paper, a design method for automotive architectures is proposed. The two main technical contributions are (i) a novel hardware/software architecture encoding that unifies ...