Sciweavers

702 search results - page 54 / 141
» Timing Driven Architectural Adaptation
Sort
View
ISVLSI
2006
IEEE
126views VLSI» more  ISVLSI 2006»
14 years 4 months ago
QUKU: A Two-Level Reconfigurable Architecture
FPGAs have been used for prototyping of ASICs, for low-volume ASIC replacement and for systems requiring in-field hardware upgrades. However, the potential to use dynamic reconfig...
Sunil Shukla, Neil W. Bergmann, Jürgen Becker
ICALT
2006
IEEE
14 years 4 months ago
Augmented Learning: Context-Aware Mobile Augmented Reality Architecture for Learning
Mobile Augmented Reality System (MARS) based elearning environments equip a learner with a mobile wearable see-through display that interacts with training/learning software. MARS...
Jayfus T. Doswell
FPL
2008
Springer
111views Hardware» more  FPL 2008»
13 years 11 months ago
Hyperreconfigurable architectures
Dynamically reconfigurable architectures or systems are able to reconfigure their function and/or structure to suit the changing needs of a computation during run time. The increa...
Sebastian Lange, Martin Middendorf
CASES
2006
ACM
14 years 4 months ago
A case study of multi-threading in the embedded space
The continuing miniaturization of technology coupled with wireless networks has made it feasible to physically embed sensor network systems into the environment. Sensor net proces...
Greg Hoover, Forrest Brewer, Timothy Sherwood
ISCAS
2007
IEEE
122views Hardware» more  ISCAS 2007»
14 years 4 months ago
Multi-Channel Coherent Detection for Delay-Insensitive Model-Free Adaptive Control
— A mixed-signal architecture for continuous-time multidimensional model-free optimization is presented. It is based on multi-channel coherent modulation and detection that relia...
Dimitrios N. Loizos, Paul-Peter Sotiriadis, Gert C...