Sciweavers

483 search results - page 51 / 97
» Timing Games and Shared Memory
Sort
View
ICPP
1998
IEEE
14 years 2 months ago
A memory-layout oriented run-time technique for locality optimization
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
Yong Yan, Xiaodong Zhang, Zhao Zhang
ICPP
2009
IEEE
14 years 4 months ago
Improving Resource Availability by Relaxing Network Allocation Constraints on Blue Gene/P
— High-end computing (HEC) systems have passed the petaflop barrier and continue to move toward the next frontier of exascale computing. As companies and research institutes con...
Narayan Desai, Darius Buntinas, Daniel Buettner, P...
DATE
2005
IEEE
160views Hardware» more  DATE 2005»
14 years 3 months ago
SOC Testing Methodology and Practice
Abstract—On a commercial digital still camera (DSC) controller chip we practice a novel SOC test integration platform, solving real problems in test scheduling, test IO reduction...
Cheng-Wen Wu
EOR
2007
87views more  EOR 2007»
13 years 10 months ago
An optimal and scalable parallelization of the two-list
In this paper, we suggest a parallel algorithm based on a shared memory SIMD architecture for solving an n item subset-sum problem in time O(2n/2 /p) by using p = 2q processors, 0...
Carlos Alberto Alonso Sanches, Nei Yoshihiro Soma,...
SAMOS
2010
Springer
13 years 7 months ago
Power aware heterogeneous MPSoC with dynamic task scheduling and increased data locality for multiple applications
A new heterogeneous multiprocessor system with dynamic memory and power management for improved performance and power consumption is presented. Increased data locality is automatic...
Oliver Arnold, Gerhard Fettweis