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DATE
2008
IEEE
113views Hardware» more  DATE 2008»
14 years 4 months ago
Compositional, dynamic cache management for embedded chip multiprocessors
This paper proposes a dynamic cache repartitioning technique that enhances compositionality on platforms executing media applications with multiple utilization scenarios. The repa...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
IEEEPACT
2008
IEEE
14 years 4 months ago
Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor
Moore’s Law and the drive towards performance efficiency have led to the on-chip integration of general-purpose cores with special-purpose accelerators. Pangaea is a heterogeneo...
Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aa...
RTSS
2008
IEEE
14 years 4 months ago
Predictable Interrupt Management and Scheduling in the Composite Component-Based System
This paper presents the design of user-level scheduling hierarchies in the Composite component-based system. The motivation for this is centered around the design of a system that...
Gabriel Parmer, Richard West
CODES
2006
IEEE
14 years 3 months ago
Integrated analysis of communicating tasks in MPSoCs
Predicting timing behavior is key to efficient embedded real-time system design and verification. Especially memory accesses and co-processor calls over shared communication net...
Simon Schliecker, Matthias Ivers, Rolf Ernst
SPAA
2004
ACM
14 years 3 months ago
Fighting against two adversaries: page migration in dynamic networks
Page migration is one of the fundamental subproblems in the framework of data management in networks. It occurs in a distributed network of processors sharing one indivisible memo...
Marcin Bienkowski, Miroslaw Korzeniowski, Friedhel...