Sciweavers

256 search results - page 8 / 52
» Timing Verification by Successive Approximation
Sort
View
ENTCS
2006
134views more  ENTCS 2006»
13 years 11 months ago
Computing Over-Approximations with Bounded Model Checking
Bounded Model Checking (BMC) searches for counterexamples to a property with a bounded length k. If no such counterexample is found, k is increased. This process terminates when ...
Daniel Kroening
DAC
2001
ACM
14 years 12 months ago
Formal Property Verification by Abstraction Refinement with Formal, Simulation and Hybrid Engines
roperty Verification by Abstraction Refinement with Formal, Simulation and Hybrid Engines Dong Wang , Pei-Hsin Ho , Jiang Long , James Kukula Yunshan Zhu , Tony Ma , Robert D...
Dong Wang, Pei-Hsin Ho, Jiang Long, James H. Kukul...
DAC
1997
ACM
14 years 3 months ago
A C-Based RTL Design Verification Methodology for Complex Microprocessor
Cr, As the complexity of high-performance microprocessor increases, functional verification becomes more and more difficult and RTL simulation emerges as the bottleneck of the des...
Joon-Seo Yim, Yoon-Ho Hwang, Chang-Jae Park, Hoon ...
FMCAD
2008
Springer
14 years 13 days ago
Verifying an Arbiter Circuit
Abstract--This paper presents the verification of an asynchronous arbiter modeled at the circuit level with non-linear ordinary differential equations. We use Brockett's annul...
Chao Yan, Mark R. Greenstreet
HSNMC
2003
Springer
134views Multimedia» more  HSNMC 2003»
14 years 4 months ago
Analytical Approach and Verification of a DiffServ-Based Priority Service
The provision of Quality of Service (QoS) in a seamless way over the dominating internetworking protocol of our times (IP), has been a challenge for many researchers in the past ye...
Christos Bouras, Afrodite Sevasti