290 search results - page 14 / 58 » Timing analysis in high-level synthesis |
OOPSLA
2010
Springer
13 years 6 months ago
2010
Springer
Given a high-level specification and a low-level programming language, our goal is to automatically synthesize an efficient program that meets the specification. In this paper,...
CBSE
2005
Springer
14 years 1 months ago
2005
Springer
We consider a class of component-based software models with interaction style of buffered asynchronous message passing between components with ports, represented by UML-RT. After ...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper presents a novel approach for multiprocess synthesis supporting well-tailored module integration at system level. The goal is to extend the local scope of existing arch...
ICCAD
1994
IEEE
13 years 12 months ago
1994
IEEE
- This paper addresses the problem of true delay estimation during high level design. The existing delay estimation techniques either estimate the topological delay of the circuit ...
ECBS
1996
IEEE
13 years 12 months ago
1996
IEEE
In this paper, it is shown that, through the use of Model-Integrated Program Synthesis MIPS, parallel real-time implementations of image processing data ows can be synthesized fro...