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» Timing analysis in high-level synthesis
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IPCCC
2005
IEEE
14 years 3 months ago
Cluster-based input/output trace synthesis
I/O traces are crucial for understanding the performance of new storage architectures. Unfortunately, traces are extremely bursty and difficult to characterize. They are large, d...
Bo Hong, Tara M. Madhyastha, B. Zhang
AES
2004
Springer
190views Cryptology» more  AES 2004»
14 years 3 months ago
Small Size, Low Power, Side Channel-Immune AES Coprocessor: Design and Synthesis Results
Abstract. When cryptosystems are being used in real life, hardware and software implementations themselves present a fruitful field for attacks. Side channel attacks exploit infor...
Elena Trichina, Tymur Korkishko, Kyung-Hee Lee
DATE
2005
IEEE
144views Hardware» more  DATE 2005»
14 years 3 months ago
Context Sensitive Performance Analysis of Automotive Applications
Accurate timing analysis is key to efficient embedded system synthesis and integration. While industrial control software systems are developed using graphical models, such as Ma...
Jan Staschulat, Rolf Ernst, Andreas Schulze, Fabia...
CDC
2010
IEEE
124views Control Systems» more  CDC 2010»
13 years 5 months ago
A relaxation of Lyapunov conditions and controller synthesis for discrete-time periodic systems
This paper proposes a novel approach to stability analysis and controller synthesis for discrete-time periodically time-varying systems. Firstly, a relaxation of standard Lyapunov ...
Christoph Bohm, Mircea Lazar, Frank Allgöwer
WSC
2008
14 years 12 days ago
Predictive-conservative synchronization for commercial simulation package interoperability
Distributed simulation is desired in many industries to support analysis and decision making for complex and integrated problems. Interoperating commercial simulation packages usi...
Yuanxi Liang, Stephen John Turner, Boon-Ping Gan