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» Timing analysis in high-level synthesis
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DATE
2009
IEEE
122views Hardware» more  DATE 2009»
14 years 4 months ago
Model-based synthesis and optimization of static multi-rate image processing algorithms
Abstract—High computational effort in modern image processing applications like medical imaging or high-resolution video processing often demands for massively parallel special p...
Joachim Keinert, Hritam Dutta, Frank Hannig, Chris...
ICCD
2004
IEEE
122views Hardware» more  ICCD 2004»
14 years 7 months ago
Linear Programming based Techniques for Synthesis of Network-on-Chip Architectures
Network-on-chip (NoC) has been proposed as a solution for the communication challenges of System-on-chip (SoC) design in the nanoscale regime. SoC design offers the opportunity fo...
Krishnan Srinivasan, Karam S. Chatha, Goran Konjev...
CIBSE
2009
ACM
14 years 4 months ago
A Domain Specific Language to Generate Web Applications
Nowadays building a web application is still a complex process that requires a big effort to get several tasks done. This article presents a domain specific language aimed to simpl...
Juan José Cadavid, Juan Bernardo Quintero, ...
EUROPAR
2001
Springer
14 years 2 months ago
A Component Framework for HPC Applications
Abstract. We describe a general component software framework designed for demanding grid environments that provides optimal performance for the assembled component application. Thi...
Nathalie Furmento, Anthony Mayer, Stephen McGough,...
DATE
2000
IEEE
121views Hardware» more  DATE 2000»
14 years 2 months ago
Composite Signal Flow: A Computational Model Combining Events, Sampled Streams, and Vectors
The composite signal flow model of computation targets systems with significant control and data processing parts. It builds on the data flow and synchronous data flow models ...
Axel Jantsch, Per Bjuréus