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» Timing driven power gating
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DATE
2007
IEEE
130views Hardware» more  DATE 2007»
14 years 2 months ago
Development of on board, highly flexible, Galileo signal generator ASIC
Alcatel Alenia Space is deeply involved in the Galileo program at many stages. In particular, Alcatel Alenia Space has successfully designed and delivered the very first navigatio...
Louis Baguena, Emmanuel Liégeon, Alexandra ...
ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
14 years 2 months ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks
PLDI
2011
ACM
12 years 11 months ago
Caisson: a hardware description language for secure information flow
Information flow is an important security property that must be incorporated from the ground up, including at hardware design time, to provide a formal basis for a system’s roo...
Xun Li 0001, Mohit Tiwari, Jason Oberg, Vineeth Ka...
EUROCRYPT
2012
Springer
11 years 11 months ago
Fully Homomorphic Encryption with Polylog Overhead
We show that homomorphic evaluation of (wide enough) arithmetic circuits can be accomplished with only polylogarithmic overhead. Namely, we present a construction of fully homomorp...
Craig Gentry, Shai Halevi, Nigel P. Smart
ROBOCUP
2007
Springer
159views Robotics» more  ROBOCUP 2007»
14 years 2 months ago
Model Checking Hybrid Multiagent Systems for the RoboCup
Abstract. This paper shows how multiagent systems can be modeled by a combination of UML statecharts and hybrid automata. This allows formal system cation on different levels of ab...
Ulrich Furbach, Jan Murray, Falk Schmidsberger, Fr...