4164 search results - page 63 / 833 » Timing model reduction for hierarchical timing analysis |
VLDB
2006
ACM
14 years 10 months ago
2006
ACM
Managing large-scale time series databases has attracted significant attention in the database community recently. Related fundamental problems such as dimensionality reduction, tr...
DATE
1999
IEEE
14 years 2 months ago
1999
IEEE
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
ICCAD
2001
IEEE
14 years 7 months ago
2001
IEEE
We present a methodology for generating black-box timing models for full-custom transistor-level CMOS circuits. Our approach utilizes transistor-level ternary symbolic timing simu...
DAC
2005
ACM
14 years 3 days ago
2005
ACM
Traditional corner analysis fails to guarantee a target yield for a given performance metric. However, recently proposed solutions, in the form of statistical timing analysis, whi...
BMCBI
2010
13 years 7 months ago
2010
Background: Most genomic data have ultra-high dimensions with more than 10,000 genes (probes). Regularization methods with L1 and Lp penalty have been extensively studied in survi...