188 search results - page 12 / 38 » Timing-driven optimization using lookahead logic circuits |
FPGA
2006
ACM
14 years 1 months ago
2006
ACM
Abstract--Field-programmable gate-array (FPGA) logic synthesis and technology mapping have been studied extensively over the past 15 years. However, progress within the last few ye...
DATE
2010
IEEE
14 years 3 months ago
2010
IEEE
— The paper introduces novel field programmable gate array (FPGA) circuits based on hybrid CMOS/resistive switching device (memristor) technology and explores several logic archi...
ICCAD
1995
IEEE
14 years 1 months ago
1995
IEEE
—A problem in technology mapping is that the quality of the final implementation depends significantly on the initially provided circuit structure. This problem is critical, es...
FPGA
2008
ACM
13 years 11 months ago
2008
ACM
Logical effort (LE) is a linear technique for modelling the delay of a circuit in a technology independent manner. It offers the potential to simplify delay models for FPGAs and g...
JCIT
2008
13 years 10 months ago
2008
The main objective of design methodology of a controller for forecasting cardiac arrest using fuzzy logic approach is to provide the prediction of period of life time for the pati...