120 search results - page 12 / 24 » Timing-driven placement for FPGAs |
FPL
2000
Springer
13 years 11 months ago
2000
Springer
State-of-the-art FPGAs possess I/O resources that can be configured to support a wide variety of I/O standards [1]. In such devices, the I/O resources are grouped into banks. One o...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Increasing power densities in Field Programmable Gate Arrays (FPGAs) have made them susceptible to thermal problems. The advent of platform FPGAs has further exacerbated the probl...
FCCM
2002
IEEE
14 years 20 days ago
2002
IEEE
C-slow retiming (changing a design to support multiple instances of a computation) and datapath-aware placement have long been advocated by members of the FPGA synthesis community...
ERSA
2006
13 years 9 months ago
2006
Thermal monitoring of a design plays a vital role to ensure safe and reliable thermal operating conditions. Thermal monitoring by employing thermal sensors is a popular technique ...
FPL
2004
Springer
14 years 1 months ago
2004
Springer
In order to enable efficient integration of FPGAs into cost effective and reliable high-performance systems as well potentially into low power mobile systems, their power efficienc...