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SIGCSE
1999
ACM
15 years 6 months ago
1999
ACM
The wide-spread use of microprocessor based systems that utilize cache memory to alleviate excessively long DRAM access times introduces a new dimension in the quest to obtain goo...
111
Voted
ISLPED
2005
ACM
15 years 8 months ago
2005
ACM
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
132
Voted
ISCA
2006
IEEE
15 years 8 months ago
2006
IEEE
Level one cache normally resides on a processor’s critical path, which determines the clock frequency. Directmapped caches exhibit fast access time but poor hit rates compared w...
127
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ISCAPDCS
2003
15 years 3 months ago
2003
Data intensive service functions such as memory allocation/de-allocation, data prefetching, and data relocation can pollute processor cache in conventional systems since the same ...
109
Voted
ICCD
2004
IEEE
15 years 11 months ago
2004
IEEE
Simultaneous Multithreading (SMT) is emerging as an effective microarchitecture model to increase the utilization of resources in modern super-scalar processors. However, co-sched...