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» To Parallelize or Not to Parallelize, Speed Up Issue
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HPCA
2005
IEEE
14 years 2 months ago
Chip Multithreading: Opportunities and Challenges
Chip Multi-Threaded (CMT) processors provide support for many simultaneous hardware threads of execution in various ways, including Simultaneous Multithreading (SMT) and Chip Mult...
Lawrence Spracklen, Santosh G. Abraham
EUROPAR
2005
Springer
14 years 2 months ago
Tolerating Message Latency Through the Early Release of Blocked Receives
Large message latencies often lead to poor performance of parallel applications. In this paper, we investigate a latency-tolerating technique that immediately releases all blocking...
Jian Ke, Martin Burtscher, William Evan Speight
PADS
1996
ACM
14 years 20 days ago
Experiments in Automated Load Balancing
One of the promises of parallelized discrete-event simulation is that it might provide significant speedups over sequential simulation. In reality, high performance cannot be achi...
Linda F. Wilson, David M. Nicol
IPPS
2007
IEEE
14 years 2 months ago
Improving Scalability of OpenMP Applications on Multi-core Systems Using Large Page Support
Modern multi-core architectures have become popular because of the limitations of deep pipelines and heating and power concerns. Some of these multi-core architectures such as the...
Ranjit Noronha, Dhabaleswar K. Panda
IPPS
2003
IEEE
14 years 1 months ago
Using Incorrect Speculation to Prefetch Data in a Concurrent Multithreaded Processor
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
Ying Chen, Resit Sendag, David J. Lilja