Sciweavers

134 search results - page 15 / 27
» Tolerance Models in Hardware Description Languages
Sort
View
FM
1999
Springer
161views Formal Methods» more  FM 1999»
14 years 27 days ago
Combining Theorem Proving and Continuous Models in Synchronous Design
Support for system speci cation in terms of modelling and simulation environments has become a common practice in safety-critical applications. Also, a current trend is the automat...
Simin Nadjm-Tehrani, Ove Åkerlund
ATVA
2007
Springer
226views Hardware» more  ATVA 2007»
14 years 2 months ago
Bounded Model Checking of Analog and Mixed-Signal Circuits Using an SMT Solver
This paper presents a bounded model checking algorithm for the verification of analog and mixed-signal (AMS) circuits using a satisfiability modulo theories (SMT) solver. The sys...
David Walter, Scott Little, Chris J. Myers
DSD
2004
IEEE
129views Hardware» more  DSD 2004»
14 years 11 days ago
Functional Validation of Programmable Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Prabhat Mishra, Nikil D. Dutt
DAC
1992
ACM
14 years 21 days ago
Synthesis from Production-Based Specifications
This paper describes a model for, and an implementation of, production-based synthesis of hardware description language (HDL) code in which the overall structure of the resultant ...
Andrew Seawright, Forrest Brewer
DATE
2009
IEEE
120views Hardware» more  DATE 2009»
14 years 3 months ago
Towards a formal semantics for the AADL behavior annex
—AADL is an Architecture Description Language which describes embedded real-time systems. Behavior annex is an extension of the dispatch mechanism of AADL execution model. This p...
Zhibin Yang, Kai Hu, Dianfu Ma, Lei Pi