134 search results - page 25 / 27 » Tolerance Models in Hardware Description Languages |
ASPLOS
2006
ACM
14 years 1 months ago
2006
ACM
Concurrency bugs are among the most difficult to test and diagnose of all software bugs. The multicore technology trend worsens this problem. Most previous concurrency bug detect...
AEI
2010
13 years 7 months ago
2010
Abstract-- Computational modellers are becoming increasingly interested in building large, eclectic, biological models. These may integrate nervous system components at various lev...
DT
2006
13 years 7 months ago
2006
process: Designers must define higher abstraction levels that allow system modeling. They must use description languages that handle both hardware and software components to descri...
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most...
TVLSI
2008
2008
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
13 years 7 months ago
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...