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GECCO
2009
Springer
130views Optimization» more  GECCO 2009»
14 years 2 months ago
Liposome logic
VLSI research, in its continuous push toward further miniaturisation, is seeking to break through the limitations of current circuit manufacture techniques by moving towards biomi...
James Smaldon, Natalio Krasnogor, Alexander Camero...
ASWSD
2004
Springer
14 years 1 months ago
Simulink Integration of Giotto/TDL
The paper first presents the integration options of what we call the Timing Description Language (TDL) with MathWorks' Simulink tools. Based on the paradigm of logical executi...
Wolfgang Pree, Gerald Stieglbauer, Josef Templ
ECLIPSE
2005
ACM
13 years 10 months ago
Leveraging Eclipse for integrated model-based engineering of web service compositions
In this paper we detail the design and implementation of an Eclipse plug-in for an integrated, model-based approach, to the engineering of web service compositions. The plug-in al...
Howard Foster, Sebastián Uchitel, Jeff Mage...
TCAD
2008
93views more  TCAD 2008»
13 years 7 months ago
Chip Optimization Through STI-Stress-Aware Placement Perturbations and Fill Insertion
Starting at the 65-nm node, stress engineering to improve the performance of transistors has been a major industry focus. An intrinsic stress source--shallow trench isolation (STI)...
Andrew B. Kahng, Puneet Sharma, Rasit Onur Topalog...
ISPASS
2008
IEEE
14 years 2 months ago
Configurational Workload Characterization
Although the best processor design for executing a specific workload does depend on the characteristics of the workload, it can not be determined without factoring-in the effect o...
Hashem Hashemi Najaf-abadi, Eric Rotenberg