513 search results - page 70 / 103 » Towards a Model for Hardware and Software Functional Partiti... |
130
Voted
CGO
2004
IEEE
15 years 7 months ago
2004
IEEE
Pre-execution techniques have received much attention as an effective way of prefetching cache blocks to tolerate the everincreasing memory latency. A number of pre-execution tech...
115
Voted
DATE
2009
IEEE
15 years 10 months ago
2009
IEEE
RTOS Simulation Henning Zabel, Wolfgang Mueller Universität Paderborn, C-LAB Fürstenallee 11, D-33102 Paderborn, Germany —Today, mobile and embedded real-time systems have to c...
127
Voted
IPPS
2003
IEEE
15 years 8 months ago
2003
IEEE
Tiled architectures can provide a model for early estimation of global interconnect costs. A design exploration tool for reconfigurable architectures is currently under developmen...
127
Voted
DATE
1999
IEEE
15 years 7 months ago
1999
IEEE
In this paper, we consider the problem of maximizing the battery life (or duration of service) in battery-powered CMOS circuits. We first show that the battery efficiency (or utili...
143
Voted
WADT
1999
Springer
15 years 7 months ago
1999
Springer
Based on the FOCUS theory of distributed systems (see [Broy, Stølen 01]) that are composed of interacting components we introduce a formal model of services and layered architectu...