91 search results - page 16 / 19 » Towards a Thread-Based Parallel Direct Execution Simulator |
SC
2009
ACM
14 years 1 months ago
2009
ACM
In order to understand the complex physics of mother nature, physicist often use many approximations to understand one area of physics and then write a simulation to reduce these ...
PDP
2010
IEEE
14 years 23 days ago
2010
IEEE
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
ISCA
2002
IEEE
13 years 8 months ago
2002
IEEE
In this paper, we consider the tree task graphs which arise from many important programming paradigms such as divide and conquer, branch and bound etc., and the linear task-graphs...
CGO
2006
IEEE
14 years 2 months ago
2006
IEEE
Explicit Data Graph Execution (EDGE) architectures offer the possibility of high instruction-level parallelism with energy efficiency. In EDGE architectures, the compiler breaks ...
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper presents and evaluates a strategy for integrating the Snort network intrusion detection system into a high-performance programmable Ethernet network interface card (NIC...