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» Towards an Active Network Architecture
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VLSID
2002
IEEE
149views VLSI» more  VLSID 2002»
14 years 11 months ago
Development of ASIC Chip-Set for High-End Network Processing Application-A Case Study
Choosing the right methodology is a significant step towards successful VLSI designs. Traditional methodologies and tools are no longer adequate to handle large and complex design...
Sanjeev Patel
VLSID
2002
IEEE
138views VLSI» more  VLSID 2002»
14 years 11 months ago
ETAM++: Extended Transition Activity Measure for Low Power Address Bus Designs
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
Haris Lekatsas, Jörg Henkel
CAISE
2003
Springer
14 years 4 months ago
Leveraging Web-Services and Peer-to-Peer Networks
Abstract. Peer-oriented computing is an attempt to weave interconnected machines into the fabric of the Internet. Service-oriented computing (exemplified by web-services), on the ...
Mike P. Papazoglou, Bernd J. Krämer, Jian Yan...
POLICY
2009
Springer
14 years 5 months ago
Towards Session-Aware RBAC Administration and Enforcement with XACML
Abstract—An administrative role-based access control (ARBAC) model specifies administrative policies over a role-based access control (RBAC) system, where an administrative perm...
Min Xu, Duminda Wijesekera, Xinwen Zhang, Deshan C...
ISCA
2007
IEEE
111views Hardware» more  ISCA 2007»
14 years 5 months ago
Express virtual channels: towards the ideal interconnection fabric
Due to wire delay scalability and bandwidth limitations inherent in shared buses and dedicated links, packet-switched on-chip interconnection networks are fast emerging as the per...
Amit Kumar 0002, Li-Shiuan Peh, Partha Kundu, Nira...