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» Towards integration driven design
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DATE
2010
IEEE
162views Hardware» more  DATE 2010»
14 years 22 days ago
Error resilience of intra-die and inter-die communication with 3D spidergon STNoC
: Scaling down in very deep submicron (VDSM) technologies increases the delay, power consumption of on-chip interconnects, while the reliability and yield decrease. In high perform...
Vladimir Pasca, Lorena Anghel, Claudia Rusu, Ricca...
CHI
2007
ACM
14 years 8 months ago
Facebook ride connect
Ride Connect is a tool integrated into the social networking site Facebook's (www.Facebook.com) event planning feature. Ride Connect helps people coordinate transportation t...
John M. Booher, Balakrishna Chennupati, Nina S. On...
DAC
2008
ACM
14 years 8 months ago
Automated transistor sizing for FPGA architecture exploration
The creation of an FPGA requires extensive transistor-level design. This is necessary for both the final design, and during architecture exploration, when many different logic and...
Ian Kuon, Jonathan Rose
WWW
2006
ACM
14 years 8 months ago
Capturing RIA concepts in a web modeling language
This work addresses conceptual modeling and automatic code generation for Rich Internet Applications, a variant of Web-based systems bridging the gap between desktop and Web inter...
Alessandro Bozzon, Sara Comai, Piero Fraternali, G...
ICTAI
2007
IEEE
14 years 1 months ago
Assessing Hierarchical Cooperative CoEvolution
Recently, many research efforts are directed towards coevolutionary algorithms. The present work aims at the assessment of Hierarchical Cooperative CoEvolution (HCCE) being proper...
Michail Maniadakis, Panos E. Trahanias