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ASAP
2007
IEEE
175views Hardware» more  ASAP 2007»
15 years 7 months ago
Scalable Multi-FPGA Platform for Networks-On-Chip Emulation
Interconnect validation is an important early step toward global SoC (System-On-Chip) validation. Fast performances evaluation and design space exploration for NoCs (Networks-On-C...
Abdellah-Medjadji Kouadri-Mostefaoui, Benaoumeur S...
DIMVA
2006
15 years 7 months ago
Network-Level Polymorphic Shellcode Detection Using Emulation
Abstract. As state-of-the-art attack detection technology becomes more prevalent, attackers are likely to evolve, employing techniques such as polymorphism and metamorphism to evad...
Michalis Polychronakis, Kostas G. Anagnostakis, Ev...
WSC
1997
15 years 7 months ago
Simulation of the Queston Physician Network
This paper examines the construction and implementation of a simulation model that supports the design and development of the Queston Physician Network. Queston seeks to partner w...
James R. Swisher, J. Brian Jun, Sheldon H. Jacobso...
USENIX
1994
15 years 7 months ago
Experiences with a Survey Tool for Discovering Network Time Protocol Servers
The Network Time Protocol (NTP) is widely used to synchronize computer clocks throughout the Internet. Existing NTP clients and servers form a very large distributed system, and y...
James D. Guyton, Michael F. Schwartz
CIBCB
2009
IEEE
15 years 6 months ago
Improved prediction of trans-membrane spans in proteins using an artificial neural network
Tools for the identification of trans-membrane spans from the protein sequence are widely used in the experimental community. Computational structural biology seeks to increase the...
Julia Koehler, Ralf Mueller, Jens Meiler