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ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
14 years 1 months ago
Multiple Instruction Stream Processor
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...
Richard A. Hankins, Gautham N. Chinya, Jamison D. ...
ICFP
2008
ACM
14 years 7 months ago
A scheduling framework for general-purpose parallel languages
The trend in microprocessor design toward multicore and manycore processors means that future performance gains in software will largely come from harnessing parallelism. To reali...
Matthew Fluet, Mike Rainey, John H. Reppy
AVI
2008
13 years 10 months ago
The in-context slider: a fluid interface component for visualization and adjustment of values while authoring
As information environments grow in complexity, we yearn for simple interfaces that streamline human cognition and effort. Users need to perform complex operations on thousands of...
Andrew Webb, Andruid Kerne
CSFW
2002
IEEE
14 years 17 days ago
Capturing Parallel Attacks within the Data Independence Framework
We carry forward the work described in our previous papers [3, 14, 12] on the application of data independence to the model checking of cryptographic protocols using CSP [13] and ...
Philippa J. Broadfoot, A. W. Roscoe
DFG
2001
Springer
14 years 3 days ago
Interactive medical 3D-simulations by means of stereoscopy and standard hardware
: Using stereo-3D hardware in its different solutions is not new, but most available applications use these Hardware only for a better visualization of 3d-reconstructions. It is an...
Kay Melzer, Hans-Gerd Lipinski, Dietrich H. W. Gr&...