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» Towards the Optimal Design of Numerical Experiments
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DATE
2009
IEEE
119views Hardware» more  DATE 2009»
14 years 2 months ago
On-chip communication architecture exploration for processor-pool-based MPSoC
— MPSoC is evolving towards processor-pool (PP)-based architectures, which employ hierarchical on-chip network for inter- and intra-PP communication. Since the design space of PP...
Young-Pyo Joo, Sungchan Kim, Soonhoi Ha
VLSID
1999
IEEE
93views VLSI» more  VLSID 1999»
13 years 12 months ago
Spec-Based Repeater Insertion and Wire Sizing for On-chip Interconnect
Recently Lillis, et al. presented an elegant dynamic programming approach to RC interconnect delay optimization through driver sizing, repeater insertion, and, wire sizing which e...
Noel Menezes, Chung-Ping Chen
ICCV
2001
IEEE
14 years 9 months ago
A Novel Modeling Algorithm for Shape Recovery of Unknown Topology
This paper presents a novel modeling algorithm that is capable of simultaneously recovering correct shape geometry as well as its unknown topology from arbitrarily complicated dat...
Ye Duan, Hong Qin
JETAI
2007
131views more  JETAI 2007»
13 years 7 months ago
A computational architecture for heterogeneous reasoning
Reasoning, problem solving, indeed the general process of acquiring knowledge, is not an isolated, homogenous affair involving a one agent using a single form of representation, b...
Dave Barker-Plummer, John Etchemendy
WSCG
2004
185views more  WSCG 2004»
13 years 9 months ago
Automatic Fitting and Control of Complex Freeform Shapes in 3-D
In many computer graphics and computer-aided design problems, it is very common to find a smooth and well structured surface to fit a set of unstructured 3-dimensional data. Altho...
Yu Song, Joris S. M. Vergeest, Chensheng Wang