204 search results - page 12 / 41 » Trace Processors |
IEEEPACT
2006
IEEE
14 years 2 months ago
2006
IEEE
Fast instruction decoding is a challenge for the design of CISC microprocessors. A well-known solution to overcome this problem is using a trace cache. It stores and fetches alrea...
EGH
2004
Springer
14 years 2 months ago
2004
Springer
Realtime ray tracing has recently established itself as a possible alternative to the current rasterization approach for interactive 3D graphics. However, the performance of exist...
TVLSI
2002
13 years 8 months ago
2002
This paper presents the development of instruction analysis/scheduling CAD techniques to measure the distribution of functional unit usage and the micro operation level parallelis...
PPPJ
2009
ACM
14 years 3 months ago
2009
ACM
Dynamic compilers can optimize application code speciļ¬cally for observed code behavior. Such behavior does not have to be stable across the entire program execution to be beneļ¬...
ICS
1999
Tsinghua U.
14 years 27 days ago
1999
Tsinghua U.
āThis paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...