Sciweavers

639 search results - page 46 / 128
» Tradeoffs in designing accelerator architectures for visual ...
Sort
View
DAC
2006
ACM
14 years 2 months ago
Use of C/C++ models for architecture exploration and verification of DSPs
Architectural decisions for DSP modules are often analyzed using high level C models. Such high-level explorations allow early examination of the algorithms and the architectural ...
David Brier, Raj S. Mitra
DAC
2009
ACM
14 years 1 months ago
A computing origami: folding streams in FPGAs
Stream processing represents an important class of applications that spans telecommunications, multimedia and the Internet. The implementation of streaming programs in FPGAs has a...
Andrei Hagiescu, Weng-Fai Wong, David F. Bacon, Ro...
CAV
2006
Springer
105views Hardware» more  CAV 2006»
14 years 16 days ago
FAST Extended Release
Fast is a tool designed for the analysis of counter systems, i.e. automata extended with unbounded integer variables. Despite the reachability set is not recursive in general, Fast...
Sébastien Bardin, Jérôme Lerou...
ASPLOS
2010
ACM
14 years 1 months ago
An asymmetric distributed shared memory model for heterogeneous parallel systems
Heterogeneous computing combines general purpose CPUs with accelerators to efficiently execute both sequential control-intensive and data-parallel phases of applications. Existin...
Isaac Gelado, Javier Cabezas, Nacho Navarro, John ...
EUC
2006
Springer
14 years 14 days ago
Co-optimization of Performance and Power in a Superscalar Processor Design
Abstract. As process technology scales down, power wall starts to hinder improvements in processor performance. Performance optimization has to proceed under a power constraint. Th...
Yongxin Zhu, Weng-Fai Wong, Stefan Andrei