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FCCM
2008
IEEE
115views VLSI» more  FCCM 2008»
14 years 4 months ago
Simultaneous Retiming and Placement for Pipelined Netlists
Although pipelining or C-slowing an FPGA-based application can potentially dramatically improve the performance, this poses a question for conventional reconfigurable architecture...
Kenneth Eguro, Scott Hauck
ISBI
2008
IEEE
14 years 4 months ago
Morphological-based adaptive segmentation and quantification of cell assays in high content screening
In fluorescence-labelled cell assays for high content screening applications, image processing software is necessary to have automatic algorithms for segmenting the cells individ...
Jesús Angulo, Béatrice Schaack
ASWEC
2007
IEEE
14 years 4 months ago
Timed Behavior Trees and Their Application to Verifying Real-Time Systems
Behavior Trees (BTs) are a graphical notation used for formalising functional requirements and have been successfully applied to several case studies. However, the notation curren...
Lars Grunske, Kirsten Winter, Robert Colvin
DATE
2007
IEEE
85views Hardware» more  DATE 2007»
14 years 4 months ago
Timing simulation of interconnected AUTOSAR software-components
AUTOSAR is a recent specification initiative which focuses on a model-driven architecture like methodology for automotive applications. However, needed engineering steps, or how-t...
Matthias Krause, Oliver Bringmann, André He...
ISORC
2007
IEEE
14 years 4 months ago
Device Modeling for a Flexible Embedded Systems Development Process
Methodologies, techniques and tools that currently support the embedded systems (ESs) development process prove inadequate for today’s complex ESs. Adopted traditional architect...
Kleanthis C. Thamboulidis, George S. Doukas, Giann...