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SIGPLAN
2008
13 years 8 months ago
Single global lock semantics in a weakly atomic STM
As memory transactions have been proposed as a language-level replacement for locks, there is growing need for well-defined semantics. In contrast to database transactions, transa...
Vijay Menon, Steven Balensiefer, Tatiana Shpeisman...
DAC
2008
ACM
14 years 9 months ago
Latency and bandwidth efficient communication through system customization for embedded multiprocessors
We present a cross-layer customization methodology for latency and bandwidth efficient inter-core communication in embedded multiprocessors. The methodology integrates compiler, o...
Chenjie Yu, Peter Petrov
ECRTS
2002
IEEE
14 years 1 months ago
A QoS-Sensitive Approach for Timeliness and Freshness Guarantees in Real-Time Databases
The demand for real-time database services has been increasing recently. Examples include sensor data fusion, decision support, web information services, and online trading. In th...
Kyoung-Don Kang, Sang Hyuk Son, John A. Stankovic,...
HPCA
2012
IEEE
12 years 4 months ago
BulkSMT: Designing SMT processors for atomic-block execution
Multiprocessor architectures that continuously execute atomic blocks (or chunks) of instructions can improve performance and software productivity. However, all of the prior propo...
Xuehai Qian, Benjamin Sahelices, Josep Torrellas
RTAS
2006
IEEE
14 years 2 months ago
METERG: Measurement-Based End-to-End Performance Estimation Technique in QoS-Capable Multiprocessors
Multiprocessor systems present serious challenges in the design of real-time systems due to the wider variation of execution time of an instruction sequence compared to a uniproce...
Jae W. Lee, Krste Asanovic