264 search results - page 7 / 53 » Transaction level modeling: an overview |
DATE
2003
IEEE
14 years 19 days ago
2003
IEEE
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
FPT
2005
IEEE
14 years 29 days ago
2005
IEEE
We describe a communication-centric design methodology with SystemC that allows for efficient FPGA prototype generation of transaction level models (TLM). Using a framework compr...
IESS
2009
Springer
13 years 5 months ago
2009
Springer
Abstract. Embedded system design complexities are growing exponentially. Demand has increased for modeling techniques that can provide both accurate measurements of delay and fast ...
ISQED
2006
IEEE
14 years 1 months ago
2006
IEEE
System on Chip architectures have traditionally relied upon bus based interconnect for their communication needs. However, increasing bus frequencies and the load on the bus calls...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
Transaction-level modeling has been touted to improve simulation performance and modeling efficiency for early design space exploration. But no tools are available to generate suc...