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DAC
2006
ACM
14 years 2 months ago
SystemC transaction level models and RTL verification
This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
Stuart Swan
ESOP
2004
Springer
14 years 1 months ago
A Semantic Framework for Designer Transactions
A transaction defines a locus of computation that satisfies important concurrency and failure properties; these so-called ACID properties provide strong serialization guarantees ...
Jan Vitek, Suresh Jagannathan, Adam Welc, Antony L...
ITCC
2005
IEEE
14 years 1 months ago
Transaction Mechanism Design in Decentralized Computational Market
Qianfei Fu, Shoubao Yang, Maosheng Li, Junmao Zhun