429 search results - page 59 / 86 » Transactional memory |
MICRO
2008
IEEE
13 years 9 months ago
2008
IEEE
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
NOCS
2008
IEEE
14 years 4 months ago
2008
IEEE
We present a methodology to debug a SOC by concentrating on its communication. Our extended communication model includes a) multiple signal groups per interface protocol at each I...
RTSS
2007
IEEE
14 years 4 months ago
2007
IEEE
The integration phase of real-time COTS-based systems is often problematic because when multiple tasks run concurrently, the interference at the bus level between cache fetching a...
CIDR
2003
13 years 11 months ago
2003
This paper surveys distributed computing techniques used in the implementation of BEA WebLogic Server. It discusses how application servers provide a distributed transactional inf...
ASPLOS
2008
ACM
13 years 12 months ago
2008
ACM
Concurrency control is one of the main sources of error and complexity in shared memory parallel programming. While there are several techniques to handle concurrency control such...