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ISCAS
1994
IEEE
138views Hardware» more  ISCAS 1994»
14 years 2 months ago
High-Throughput Data Compressor Designs Using Content Addressable Memory
This paper presents a novel VLSI architecture for high-speed data compressor designs which implement the well-known LZ77 algorithm. The architecture mainly consists of three units...
Ren-Yang Yang, Chen-Yi Lee
ISCA
1992
IEEE
113views Hardware» more  ISCA 1992»
14 years 2 months ago
Dynamic Dependency Analysis of Ordinary Programs
A quantitative analysis of program execution is essential to the computer architecture design process. With the current trend in architecture of enhancing the performance of unipr...
Todd M. Austin, Gurindar S. Sohi
ASPDAC
2007
ACM
117views Hardware» more  ASPDAC 2007»
14 years 2 months ago
Development of Low Power ISDB-T One-Segment Decoder by Mobile Multi-Media Engine SoC (S1G)
- TOSHIBA has developed mobile multi-media engine SoC, we call as S1G, which can realize low power ISDB-T one-segment decode in 42mW for eight months short period of time. Since MP...
K. Mori, M. Suzuki, Y. Ohara, S. Matsuo, A. Asano
REFSQ
2010
Springer
14 years 2 months ago
Binary Priority List for Prioritizing Software Requirements
Product managers in software companies are confronted with a continuous stream of incoming requirements. Due to limited resources they have to make a selection of those that can be...
Thomas Bebensee, Inge van de Weerd, Sjaak Brinkkem...
PODC
2010
ACM
14 years 1 months ago
Adaptive system anomaly prediction for large-scale hosting infrastructures
Large-scale hosting infrastructures require automatic system anomaly management to achieve continuous system operation. In this paper, we present a novel adaptive runtime anomaly ...
Yongmin Tan, Xiaohui Gu, Haixun Wang