1240 search results - page 12 / 248 » Trusted Design in FPGAs |
CDES
2006
13 years 8 months ago
2006
In this paper, a double precision IEEE 754 floating-point multiplier with high speed and low power is presented. The bottleneck of any double precision floatingpoint multiplier des...
IAT
2006
IEEE
14 years 1 months ago
2006
IEEE
The incorporation of a trust network among the users of a recommender system (RS) proves beneficial to the quality and amount of recommendations. Involving also distrust can offe...
HOST
2008
IEEE
14 years 1 months ago
2008
IEEE
—Straightforward implementations of cryptographic algorithms are known to be vulnerable to attacks aimed not at the mathematical structure of the cipher but rather at the weak po...
DELTA
2006
IEEE
13 years 11 months ago
2006
IEEE
The mapping of image processing algorithms to hardware is complicated by several hardware constraints including limited processing time, limited access to data and limited resourc...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
Triple Modular Redundancy (TMR) is a suitable fault tolerant technique for SRAM-based FPGA. However, one of the main challenges in achieving 100% robustness in designs protected b...