1240 search results - page 18 / 248 » Trusted Design in FPGAs |
ECR
2010
13 years 7 months ago
2010
Abstract To date, trust and reputation systems have often been evaluated using methods of their designers' own devising. Recently, we demonstrated that a number of noteworthy ...
FPGA
2005
ACM
14 years 28 days ago
2005
ACM
FPGA-based designs are more susceptible to single-event upsets (SEUs) compared to ASIC designs. Soft error rate (SER) estimation is a crucial step in the design of soft error tole...
IFIP
2005
Springer
14 years 27 days ago
2005
Springer
We present a method for trust scenarios with more than one trustee, where sets of trustees are ordered in a relation of relative trustworthiness. We show how a priority structure i...
TCAD
2011
13 years 1 months ago
2011
—Escalating system-on-chip design complexity is the design community to raise the level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of early...
POLICY
2004
Springer
14 years 22 days ago
2004
Springer
Automated trust negotiation is the process of establishing trust between entities with no prior relationship through the iterative disclosure of digital credentials. One approach ...