Sciweavers

1240 search results - page 241 / 248
» Trusted Design in FPGAs
Sort
View
ESORICS
2003
Springer
14 years 17 days ago
Rapid Mixing and Security of Chaum's Visual Electronic Voting
Recently, David Chaum proposed an electronic voting scheme that combines visual cryptography and digital processing. It was designed to meet not only mathematical security standard...
Marcin Gomulkiewicz, Marek Klonowski, Miroslaw Kut...
ICS
2003
Tsinghua U.
14 years 17 days ago
AEGIS: architecture for tamper-evident and tamper-resistant processing
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, M...
ISCA
2010
IEEE
340views Hardware» more  ISCA 2010»
14 years 13 days ago
Necromancer: enhancing system throughput by animating dead cores
Aggressive technology scaling into the nanometer regime has led to a host of reliability challenges in the last several years. Unlike onchip caches, which can be efficiently prot...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
SIGMOD
2010
ACM
227views Database» more  SIGMOD 2010»
14 years 5 days ago
SecureBlox: customizable secure distributed data processing
We present SecureBlox, a declarative system that unifies a distributed query processor with a security policy framework. SecureBlox decouples security concerns from system speci...
William R. Marczak, Shan Shan Huang, Martin Braven...
ASIACRYPT
2001
Springer
13 years 12 months ago
Fully Distributed Threshold RSA under Standard Assumptions
The aim of this article is to propose a fully distributed environment for the RSA scheme. What we have in mind is highly sensitive applications and even if we are ready to pay a pr...
Pierre-Alain Fouque, Jacques Stern