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» Trusted Design in FPGAs
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FPGA
2007
ACM
153views FPGA» more  FPGA 2007»
14 years 1 months ago
Variation-aware routing for FPGAs
Chip design in the nanometer regime is becoming increasingly difficult due to process variations. ASIC designers have adopted statistical optimization techniques to mitigate the e...
Satish Sivaswamy, Kia Bazargan
FPL
2006
Springer
85views Hardware» more  FPL 2006»
13 years 11 months ago
High-Performance and Parameterized Matrix Factorization on FPGAs
FPGAs have become an attractive choice for scientific computing. In this paper, we propose a high performance design for LU decomposition, a key kernel in many scientific and engi...
Ling Zhuo, Viktor K. Prasanna
ICCAD
2004
IEEE
95views Hardware» more  ICCAD 2004»
14 years 4 months ago
Low-power programmable routing circuitry for FPGAs
We propose two new FPGA routing switch designs that are programmable to operate in three different modes: highspeed, low-power or sleep. High-speed mode provides similar power an...
Jason Helge Anderson, Farid N. Najm
WETICE
2000
IEEE
13 years 11 months ago
Walking the Web of Trust
Most currently deployed Public Key Infrastructures (PKIs) are hierarchically oriented and rely on a centralized design. Hierarchical PKIs may be appropriate solutions for many usa...
Germano Caronni
FPGA
2000
ACM
120views FPGA» more  FPGA 2000»
13 years 11 months ago
A novel high throughput reconfigurable FPGA architecture
With increased logic density due to the shift towards Deep Submicron technologies (DSM), FPGAs have become a viable option for implementing large designs. However, most commercial...
Amit Singh, Luca Macchiarulo, Arindam Mukherjee, M...