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ICPADS
2008
IEEE
14 years 3 months ago
A Performance Model of Communication in the Quarc NoC
Networks On-Chip (NoC) emerged as a promising communication medium for future MPSoC development. To serve this purpose, the NoCs have to be able to efficiently exchange all types...
Mahmoud Moadeli, Wim Vanderbauwhede, Ali Shahrabi
ISLPED
2006
ACM
70views Hardware» more  ISLPED 2006»
14 years 2 months ago
Sub-threshold design: the challenges of minimizing circuit energy
In this paper, we identify the key challenges that oppose subthreshold circuit design and describe fabricated chips that verify techniques for overcoming the challenges. Categorie...
Benton H. Calhoun, Alice Wang, Naveen Verma, Anant...
ITC
2003
IEEE
108views Hardware» more  ITC 2003»
14 years 2 months ago
Optical and Electrical Testing of Latchup in I/O Interface Circuits
Backside light emission and electrical measurements were used to evaluate the susceptibility to latchup of externally cabled I/O pins for a 0.13 µm technology generation [1,2] te...
Franco Stellari, Peilin Song, Moyra K. McManus, Ro...
GECCO
2003
Springer
14 years 2 months ago
Efficiency and Reliability of DNA-Based Memories
Associative memories based on DNA-affinity have been proposed [2]. Here, the performance, efficiency, reliability of DNA-based memories is quantified through simulations in silico....
Max H. Garzon, Andrew Neel, Hui Chen
BMCBI
2008
87views more  BMCBI 2008»
13 years 9 months ago
Global rank-invariant set normalization (GRSN) to reduce systematic distortions in microarray data
Background: Microarray technology has become very popular for globally evaluating gene expression in biological samples. However, non-linear variation associated with the technolo...
Carl R. Pelz, Molly Kulesz-Martin, Grover Bagby, R...